Interactive codesign for real-time embedded control systems: task graph generation from SA/VHDL models

Design of real-time embedded control systems is a complicated task. Within the Interactive Co-design approach (InCo) we adopt the SA/VHDL textual/graphical functional specification method. It facilitates modular design, hierarchical decomposition and is well suited for control dominated applications, which are not limited to linear control structures. In order to obtain cost-efficient HW/SW implementations for such a specification, HW/SW partitioning is performed that depends on information concerning the tasks involved and their sequencing. In this paper some methods are proposed for obtaining such information by static behavioral analysis. Starting with a network of finite-state machines as an abstraction of the functional behavior the proposed methods render multiple task graphs which are elementary components for HW/SW partitioning.