Implementation of Doppler noise jamming techniques using DRFM

In this paper, hardware implementation of Doppler noise and narrow band Doppler noise techniques those are jamming of Doppler frequency based on FPGA is explained. Pulse Doppler radar signal generator and receiver parts and algorithms of techniques are implemented on the Xilinx Virtex-4 FPGA. Besides, effective jamming to signal ratios of Doppler noise and narrow band Doppler noise techniques are compared.