On the use of Lee-codes for constructing multiple-valued error-correcting decision diagrams

Error-correcting decision diagrams are a method of providing fault-tolerance into logic circuits. The method combines the theory of error-correcting codes with decision diagrams to obtain robust representations for functions, which are easy to implement with a suitable technology. With error-correcting decision diagrams fault-tolerance is introduced already to the representations of functions, which means that no additional checker circuitry is required in the implementations. Error-correcting decision diagrams have been constructed using codes in the Hamming metric and the Lee metric, and with Lee-codes the complexity in terms of number of nodes in the resulting diagrams is significantly reduced due to the functional difference introduced to the diagrams by the Lee metric.