Intelligent power MOSFET driver ASIC

This paper focuses on an ASIC design for power MOSFET driver with an intelligent current driving technique which optimizes the performance and efficiency of driving single or more in parallel connected power MOSFETs. The efficient and robust driving of the power MOSFET gate is, besides the current driving techniques, also supported with the adjustable rise and fall times parameters of the driving signal. The design of the ASIC power MOSFET driver includes the implementation of safety functions which are essential for providing a higher level of robustness and reliability of the controlled power MOSFET transistor and power MOSFET system. The introduced mixed-signal ASIC is used as a single chip solution without any extra additional electronic components. This increases the integration density, reliability and reduces the costs of the power system.