Title :
Analysis of Random Telegraph Noise and low frequency noise properties in 3-d stacked NAND flash memory with tube-type poly-Si channel structure
Author :
Min-Kyu Jeong;Sung-Min Joe;Chang-Su Seo;Kyung-Rok Han;Eunseok Choi;Sung-Kye Park;Jong-Ho Lee
Author_Institution :
School of EECS and ISRC, Seoul National University, 151-742, Korea
fDate :
6/1/2012 12:00:00 AM
Abstract :
Random Telegraph Noise (RTN) and low frequency noise (LFN) properties were investigated for the first time in sub-100 nm 3-D stacked NAND flash memory with tube-type poly-Si channel structure. The 3-D stacked NAND flash memory showed higher noise power density of bit-line (BL) current (IBL) by ~10 times than 32 nm planar NAND flash memory. The behavior of ΔIBL was investigated with control-gate bias (VCG), BL bias (VBL) and pass bias (Vpass). As temperature (T) increases, capture and emission times becomes short. To understand poly-Si channel, planar poly-Si thin film transistors (TFT) with different grain size were prepared and analyzed in terms of noise, subthreshold swing (SS), and T.
Keywords :
"Noise","Flash memory","Logic gates","Thin film transistors","Grain size","Doping","Current density"
Conference_Titel :
VLSI Technology (VLSIT), 2012 Symposium on
Print_ISBN :
978-1-4673-0846-5
Electronic_ISBN :
2158-9682
DOI :
10.1109/VLSIT.2012.6242458