• DocumentCode
    3648326
  • Title

    Design of the internal DAC in SAR ADCs

  • Author

    Behnam Sedighi;Anh T. Huynh;Efstratios Skafidas

  • Author_Institution
    National ICT Australia (NICTA), Department of Electrical and Electronic Engineering, The University of Melbourne, Parkville, VIC 3010, Australia
  • fYear
    2012
  • Firstpage
    1012
  • Lastpage
    1015
  • Abstract
    This paper investigates the tradeoffs in the design of a charge-redistribution D/A converter (DAC) in successive-approximation register A/D converters. A new capacitive DAC is also introduced. It is shown that the proposed circuit can reduce the power dissipation by a factor 16, and chip area by a factor of 4, compared to a conventional DAC.
  • Keywords
    "Noise","Capacitors","Capacitance","Power dissipation","Approximation methods","Switches","Energy dissipation"
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (MWSCAS), 2012 IEEE 55th International Midwest Symposium on
  • ISSN
    1548-3746
  • Print_ISBN
    978-1-4673-2526-4
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2012.6292194
  • Filename
    6292194
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3648326