Title :
Reflective memory system based on a grid of buses that selectively uses relaxed memory consistency models
Author :
J. Protic;V. Milutinovic
Author_Institution :
Sch. of Electr. Eng., Belgrade Univ., Serbia
Abstract :
This paper proposes an extension of bus-based reflective memory system, RMS, based on the write-through update mechanism, to a grid of buses architecture, so that the number of nodes can be increased. It also examines the effects of using relaxed memory consistency models such as lazy release consistency and entry consistency in such a system. Since the performance of the two models highly depends on the application, simulation with synthetic workload, designed to express predominantly temporal and predominantly spatial application behavior was performed, and it was shown, comparing both processing power and reduction of data transfer, that lazy release model performs better when spatial locality prevails, while entry consistency performs better when temporal locality prevails.
Keywords :
"Hardware","Power system modeling","Protocols","Scalability","Electronic mail","World Wide Web","Multiprocessor interconnection networks","Broadcasting","Reflection","Added delay"
Conference_Titel :
Microelectronics, 1997. Proceedings., 1997 21st International Conference on
Print_ISBN :
0-7803-3664-X
DOI :
10.1109/ICMEL.1997.632974