DocumentCode :
3649566
Title :
Hybrid error detecting and correcting system using hardware associative memories
Author :
Ion Tutănescu;Constantin Anton;Laurenţiu Ionescu;Gheorghe Şerban;Alin Mazăre
Author_Institution :
Faculty of Electronics, Communications and Computers - University of Pitesti, Romania
fYear :
2012
Firstpage :
1
Lastpage :
5
Abstract :
This paper presents a solution of design and implementation of a hardware error correction and detection system using associative memories. This type of memory allows search of a stored binary value, having as an input data a partial (or modified) amount of this value. This property can be used in communication, for detection and correction of errors. In our experiments the encoder just associate message with corresponded word code, which is sent to communication channel. The decoder can associate back the word code received from communication channel with the message, even if the received word code has errors. This is due to associative memory recognition ability. Experimental results obtained were compared with performances of other hardware systems.
Keywords :
"Decoding","Hardware","Associative memory","Field programmable gate arrays","Polynomials","Error correction","Communication channels"
Publisher :
ieee
Conference_Titel :
Communications and Information Systems Conference (MCC), 2012 Military
Print_ISBN :
978-1-4673-1422-0
Type :
conf
Filename :
6387911
Link To Document :
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