DocumentCode
3649789
Title
A Design Methodology For The High-level Synthesis Of Fault-tolerant Asics
Author
A. Orailoglu;R. Karri
Author_Institution
University of California, San Diego
fYear
1992
fDate
6/14/1905 12:00:00 AM
Firstpage
417
Lastpage
426
Keywords
"Design methodology","High level synthesis","Fault tolerance","Application specific integrated circuits","Costs","Fault tolerant systems","Space technology","Computer science","System-on-a-chip","Large-scale systems"
Publisher
ieee
Conference_Titel
VLSI Signal Processing, V, 1992., [Workshop on]
Print_ISBN
0-7803-0811-5
Type
conf
DOI
10.1109/VLSISP.1992.641073
Filename
641073
Link To Document