Design of a 3.0 V CMOS continuous time low-pass filter with on-chip tuning circuits for CDMA cellular phone application

This paper describes a 6/sup th/-order continuous-time elliptic low-pass filter fabricated in a 0.8 /spl mu/m 2-poly, 2-metal CMOS process. The magnitude and phase characteristics meet the specification of the analog processor used in CDMA cellular phone system. The direct sample method is used in on-chip tuning circuit and it requires less area and power dissipation than conventional method using PLL. The tuning circuit stabilizes the cut-off frequency of the filter to 630 kHz with a stable external clock. Experimental results show that the filter exhibits 0.5 dB passband ripple and 42 dB stop band attenuation. The whole chip dissipates about 12 mW from a single 3.0 V supply.