A high-radix multiplier design for variable long-precision computations

The need of variable long-precision (VLP) calculations has been exposed in many scientific problems. Previous hardware solutions for VLP calculations are based on arithmetic coprocessors. These coprocessors use algorithms that are modifications of the classical multiplication algorithm. The paper presents the design of a high-radix VLP multiplier that uses the on-line arithmetic approach. The data path of the circuit allows the calculation in any precision, constrained only by the memory space. The design is intended for reconfigurable architectures. We present the on-line VLP multiplication algorithm and the main aspects of the circuit design and performance.