Integrated environment for information management in VLSI design

Rapid advances in semiconductor fabrication technology have resulted in an explosion of the number of components realizable on a Very Large Scale Integrated (VLSI) circuit. The design process which exploits this technology is extremely complex and must be supported by a project environment. To this end we examine the design process. The goal of VLSI design is to ‘compile’ a high level specification through a series of intermediate representations to the final ‘buildable’ circuit while taking full advantage of the available technology. During the design process a tremendous volume of information is generated. This paper presents an environment which is designed to facilitate the organization and handling of information generated during a VLSI design project.