A Concurrent Architecture Proposal for Information Visualization Pipeline

This paper identifies an opportunity to reduce the latency in information visualization (InfoVis) systems, exploring the parallelization of the visualization pipeline architecture. We propose a concurrent architecture where the visualization pipeline stages are modified to execute as producers and consumers threads. The threads synchronization is done by memory barriers and the data flow pass the pipeline through a unique data structure, called ring buffer, which reuses a contiguous space preallocated in memory. Two InfoVis prototypes were developed in java, the first one using sequential pipeline and the other using concurrent pipeline. The results obtained with concurrent architecture in comparison with sequential pipeline presented less execution time and memory allocation for data visualization renderization.