DocumentCode :
3658548
Title :
Statistical information processing: Computing for the nanoscale era
Author :
Naresh Shanbhag
Author_Institution :
University of Illinois at Urbana Champaign, USA
fYear :
2015
fDate :
7/1/2015 12:00:00 AM
Firstpage :
1
Lastpage :
1
Abstract :
Computing platforms operating at the limits of energy-efficiency need to contend with the issue of robustness. This energy vs. robustness trade-off is fundamental in such systems. This talk will describe a Shannon-inspired framework referred to as statistical information processing (SIP). SIP navigates the energy vs. robustness trade-off by treating the problem of energy-efficient computing as one of information processing on low-SNR and unreliable nanoscale device/circuit fabrics. In doing do, SIP seeks to transform computing from its von Neumann roots in data processing to a Shannon-inspired foundation for information processing. Key elements of SIP are the use of information-based metrics, a stochastic low-SNR circuit fabric, and statistical error compensation techniques based on estimation and detection theory, and machine learning. SIP has been used for designing energy-efficient and robust computation, communication, storage, and mixed-signal analog front-ends. This talk will conclude with a brief overview of the Systems On Nanoscale Information fabriCs (SONIC) Center, a 5-year multi-university research center, focused on developing a Shannon/brain-inspired foundation for information processing on CMOS and beyond CMOS nanoscale fabrics.
Publisher :
ieee
Conference_Titel :
Low Power Electronics and Design (ISLPED), 2015 IEEE/ACM International Symposium on
Type :
conf
DOI :
10.1109/ISLPED.2015.7273480
Filename :
7273480
Link To Document :
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