• DocumentCode
    3658583
  • Title

    An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET

  • Author

    Hayate Okuhara;Kuniaki Kitamori;Yu Fujita;Kimiyoshi Usami;Hideharu Amano

  • Author_Institution
    Keio University, 3-14-1 Hiyoshi, Kohoku-ku, Yokohama, Japan
  • fYear
    2015
  • fDate
    7/1/2015 12:00:00 AM
  • Firstpage
    207
  • Lastpage
    212
  • Abstract
    Body bias control is an efficient means of balancing the trade-off between leakage power and performance especially for chips with silicon on thin buried oxide (SOTB), a type of FD-SOI technology. In this work, a method for finding the optimal combination of the supply voltage and body bias voltage to the core and memory is proposed and applied to a real micro-controller chip using SOTB CMOS technology. By obtaining several coefficients of equations for leakage power, switching power and operational frequency from the real chip measurements, the optimized voltage setting can be obtained for the target operational frequency. The power consumption lost by the error of optimization is 12.6% at maximum, and it can save at most 73.1% of power from the cases where only the body bias voltage is optimized. This method can be applied to the latest FD-SOI technologies.
  • Keywords
    "Logic gates","Leakage currents","MOSFET circuits","Mathematical model","MOSFET","Switches","Semiconductor device measurement"
  • Publisher
    ieee
  • Conference_Titel
    Low Power Electronics and Design (ISLPED), 2015 IEEE/ACM International Symposium on
  • Type

    conf

  • DOI
    10.1109/ISLPED.2015.7273515
  • Filename
    7273515