DocumentCode :
3658797
Title :
Testing power-delivery TSVs
Author :
Hua-Xuan Li;Hua-Cheng Fu;Shi-Yu Huang;Jin-Cheng Jiang;Ding-Ming Kwai;Yung-Fa Chou
Author_Institution :
EE Dept., National Tsing Hua University, Taiwan
fYear :
2015
Firstpage :
127
Lastpage :
131
Abstract :
Many TSVs in a 3D IC are not used for signal transmission but for power delivery. Techniques needed to detect them have not been studied in-depth in the literature. In this paper, we present a test method for power-delivery TSVs, by embedding ring-oscillator (RO) based monitors (in a scalable architecture) to detect if there is any excessive voltage-drop at the end of any TSV during a manufacturing test session. One key feature as opposed to previous RO-based methods is that our approach is able to detect the worst-case dynamic voltage-drop (occurring in a very short period of time such as 1ns), rather than just the average voltage-drop over a long period of time. This is essential in order to detect small defects inside the power delivery network. These defects, if not detected, could set off a transient timing failure when the IC is operated in a system.
Keywords :
"Monitoring","Through-silicon vias","Clocks","Threshold voltage","Three-dimensional displays"
Publisher :
ieee
Conference_Titel :
Quality Electronic Design (ASQED), 2015 6th Asia Symposium on
Type :
conf
DOI :
10.1109/ACQED.2015.7274021
Filename :
7274021
Link To Document :
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