• DocumentCode
    3659093
  • Title

    High speed low energy CAM design using reordered overlapping

  • Author

    P Sowmya;K Vanitha

  • Author_Institution
    Department of Electronics and Communication Engineering, K.S. Rangasamy College of Technology, Namakkal, India
  • fYear
    2015
  • fDate
    3/1/2015 12:00:00 AM
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In this paper, a reordered search mechanism is introduced for high-speed low-power content-addressable memories (CAMs). Only by searching a few bits of a search word the mismatches can be occured. So to reduce the power consumption, search word circuit is partitioned into two sections that are searched sequentially. Searching will be faster if the last few bits is compared other than the rest of the bits. Each word circuit has a local control signal which controls the circuit. This allows the circuits to be operated in the required phase which greatly reduces the cycle time.
  • Keywords
    "Computer aided manufacturing","Random access memory","Delays","Associative memory","Solid state circuits","Conferences","Clocks"
  • Publisher
    ieee
  • Conference_Titel
    Engineering and Technology (ICETECH), 2015 IEEE International Conference on
  • Type

    conf

  • DOI
    10.1109/ICETECH.2015.7275035
  • Filename
    7275035