DocumentCode
3659154
Title
Invetigation of reconfigurable silicon nanowire Schottky Barrier transistors-based logic gate circuits and SRAM cell
Author
Juncheng Wang;Gang Du;Xiaoyan Liu
Author_Institution
Institute of Microelectronics, Peking University, Beijing, 100871, China
fYear
2015
fDate
6/1/2015 12:00:00 AM
Firstpage
1
Lastpage
2
Abstract
Reconfigurable Silicon nanowire Schottky Barrier transistors (RFETs) with configurability to be programmed as n/p-type polarity are promising for future integrated circuits. In this work, the tunable polarity characteristics of RFETs are investigated. TCAD simulations have been performed for RFETs-based INV, NOR, NAND logic gates and SRAM cell. 4-terminal RFETs presented show the potential of programmable circuits and high density integration.
Keywords
"Logic gates","SRAM cells","Schottky barriers","Integrated circuit modeling","Transient analysis","Silicon","Transistors"
Publisher
ieee
Conference_Titel
Silicon Nanoelectronics Workshop (SNW), 2015
Type
conf
Filename
7275288
Link To Document