DocumentCode :
3659177
Title :
3D-TCAD simulation study of the novel T-FinFET structure for sub-14nm metal-oxide-semiconductor field-effect transistor
Author :
Chen-Han Chou;Chung-Chun Hsu;Steve S. Chung;Chao-Hsin Chien
Author_Institution :
Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan
fYear :
2015
fDate :
6/1/2015 12:00:00 AM
Firstpage :
1
Lastpage :
2
Abstract :
We propose a novel device structure, namely T-FinFET, for sub-14nm MOSFET with using lighter anti punch through (APT) implant. According to 3D TCAD simulation, the T-FinFET is found to posses many advantages over the normal FinFET, such as better short channel effect (SCE) and drain induced barrier lowering (DIBL), having smaller S/D capacitance and junction leakage and fewer masks. Compared to gate-all-around (GAA) structure, the T-FinFET also has compatible electrical performance. All these features are obtained by depositing a self-aligned (SA) oxide after recessing the Si fin in the S/D region. It can be applied to Ge and III-V MOSFETs for suppressing the SCEs and S/D leakage, arising from higher permittivity and lower band gap than Si.
Keywords :
"FinFETs","Doping","Logic gates","Solid modeling","Implants","Three-dimensional displays","Process control"
Publisher :
ieee
Conference_Titel :
Silicon Nanoelectronics Workshop (SNW), 2015
Type :
conf
Filename :
7275311
Link To Document :
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