• DocumentCode
    3659512
  • Title

    An efficient approach for design and testing of FPGA programming using Lab VIEW

  • Author

    B. Naresh Kumar Reddy;N. Suresh;J.V.N. Ramesh;T. Pavithra;Y. Krupa Bahulya;Pranose J Edavoor;S. Janaki Ram

  • Author_Institution
    Dept. of Electronics and Computer Engineering, K.L. University, India
  • fYear
    2015
  • Firstpage
    543
  • Lastpage
    548
  • Abstract
    Programming of Field Programmable Gate Arrays (FPGAs) have long been the domain of engineers with VHDL or Verilog expertise. FPGA´s have caught the attention of algorithm developers and communication researchers, who want to use FPGAs to instantiate systems or implement DSP algorithms. These efforts however, are often stilled by the complexities of programming FPGAs. RTL programming in either VHDL or Verilog is generally not a high level of abstraction needed to represent the world of signal How graphs and complex signal processing algorithms. This paper describes the FPGA Programs using Graphical Language rather than Verilog VHDL with the help of LabVIEW and features of the LabVIEW FPGA environment.
  • Keywords
    "Hardware design languages","Field programmable gate arrays","Multiplexing","Silicon","Out of order","Data acquisition"
  • Publisher
    ieee
  • Conference_Titel
    Advances in Computing, Communications and Informatics (ICACCI), 2015 International Conference on
  • Print_ISBN
    978-1-4799-8790-0
  • Type

    conf

  • DOI
    10.1109/ICACCI.2015.7275665
  • Filename
    7275665