DocumentCode
3662354
Title
Adaptive integratable hardware realization of analog neural networks for nonlinear system
Author
Zhan Su;Bogdan M. Wilamowski;Ruixin Wang;Fa Foster Dai
Author_Institution
Department of Electrical &
fYear
2015
fDate
7/1/2015 12:00:00 AM
Firstpage
521
Lastpage
526
Abstract
This paper presents the adaptive analog hardware implementation of a MLP (multilayer perceptron architecture) ANN (artificial neural networks) for online nonlinear system operation. Neurons are implemented by bipolar differential pairs with tangent hyperbolic activation function. A bipolar current multiplier and a linearized differential amplifier are proposed for storing and adjusting the weights for ANN where its input current can be adjusted or reprogrammed by outside digital controllers. Compared with other hardware-based MLP implementations, it provides a better cost efficient ANN platform that can be fully integrated on chip while keep the network with high performance with high frequency requirements. Such an ANN platform can be adapted for differential applications on control or nonlinear model systems without changing the architecture.
Keywords
"Artificial neural networks","Hardware","Biological neural networks","Computer architecture","Neurons","Transistors","Topology"
Publisher
ieee
Conference_Titel
Industrial Informatics (INDIN), 2015 IEEE 13th International Conference on
ISSN
1935-4576
Electronic_ISBN
2378-363X
Type
conf
DOI
10.1109/INDIN.2015.7281788
Filename
7281788
Link To Document