Scheduling and allocation of time-triggered and event-triggered services for multi-core processors with networks-on-a-chip

Multi-core processors are gaining increasing importance in safety-relevant embedded real-time systems, where temporal guarantees must be ensured despite the sharing of on-chip resources such as processor cores and networks-on-a-chip. At the same time, many applications comprise workloads with different timing models including time-triggered and even-triggered communication. This paper introduces a scheduling model based on Mixed Integer Linear Programming (MILP) supporting the allocation of computational jobs to processing cores as well as the scheduling of messages and the selection of paths on networks-on-a-chip. The model supports dependencies between computational jobs and it combines both time-triggered and event-triggered messages. Phase-alignment of time-triggered messages is performed, while avoiding collisions between time-triggered messages and satisfying bandwidth constraints for event-triggered messages. Example scenarios are solved optimally using the IBM CPLEX optimizer yielding minimal computational and communication latencies.