• DocumentCode
    3662686
  • Title

    Delta DICE: A Double Node Upset resilient latch

  • Author

    Nikolaos Eftaxiopoulos;Nicholas Axelos;Georgios Zervakis;Kostas Tsoumanis;Kiamal Pekmestzi

  • Author_Institution
    Department of Computer Science, School of Electrical and Computer Engineering, National Technical University of Athens, Greece
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In this paper we propose the novel Delta DICE latch that is tolerant to SNUs (Single Node Upsets) and DNUs (Double Node Upsets). The latch comprises three DICE cells in a delta interconnection topology, providing enough redundant nodes to guarantee resilience to conventional SNUs, as well as DNUs due to charge sharing. Simulation results demonstrated that in terms of power dissipation and propagation delay, the Delta DICE latch outperforms BISER-based latches that are SNU or DNU tolerant and provides DNU resilience at a small energy×delay penalty compared to other SNU tolerant cells.
  • Keywords
    "Latches","Resilience","Delays","Topology","Propagation delay","CMOS integrated circuits","Logic gates"
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (MWSCAS), 2015 IEEE 58th International Midwest Symposium on
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2015.7282145
  • Filename
    7282145