DocumentCode :
3663845
Title :
Memory 4 triple-binary turbo codes of rate 0.6
Author :
Andy Vesa;Maria Kovaci;Lucian Trifina;Horia Balta
Author_Institution :
Faculty of Electronics and Telecommunication, University Politehnica Timisoara, Romania
fYear :
2015
Firstpage :
817
Lastpage :
822
Abstract :
In this paper, a triple binary turbo codes (TBTCs) family with rate 3/4 constituent convolutional codes of memory 4 is presented. With an observer canonical form implementation of component encoders, the family has over 500,000 units. In this family, we addressed the issue of selecting turbo codes. Through an exhaustive search using a selection criterion based on the convergence of the iterative process of turbo-decoding, we selected triple binary convolutional encoders (TBCEs). In simulations performed at their natural coding rate of 3/5 and at a coding rate of 3/4 obtained by puncturing, TBTCs resulted outperform in terms of bit/frame error rate versus signal to noise ratio (BER/FERvsSNR) the double-binary turbo code (DBTC) used in the DVB-RCS2 standard. In addition, TBTCs provide the advantages of a more compact data block structure.
Keywords :
"Convergence","Decoding","Bit error rate","Turbo codes","Convolutional codes","Observers"
Publisher :
ieee
Conference_Titel :
Methods and Models in Automation and Robotics (MMAR), 2015 20th International Conference on
Type :
conf
DOI :
10.1109/MMAR.2015.7283981
Filename :
7283981
Link To Document :
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