Optimization and FPGA implementation of a CORDIC algorithm

With the development of VLSI technology, the fast algorithms and their hardware implementation for trigonometric calculations are more and more worthy. The CORDIC (Coordinate Rotational Digital Computer) can break the basis functions down to operations of shift and addition or subtraction, which can be used to lay the foundation for the realization of complex logic operations. In this paper, an optimized CORDIC algorithm and its FPGA (Field Programmable Gate Array) implementation are proposed. The proposed algorithms are modeled in Verilog Hardware Description Language and implemented with FPGA. The simulation results show that the functions of sine and cosine are realized successfully, and the proposed algorithm not only improves the computation speed but also reduces the system hardware resources.