FPGA design of a ROM-less Direct Digital Frequency Synthesizer

DDFS (Direct Digital Frequency Synthesizer) is a new frequency synthesize technique that directly outputs the expected wave pattern based on the phase concept. In this paper, to keep the stability, high speed, low energy cost and save the hardware, the traditional frequency synthesize technique was changed in the respect of space structure and logical structure with some algorithms improved to achieve a new frequency synthesize technique. And then verilog program was used to construct the overall logical structure. And the hardware design scheme based on field programmable gate array passed the simulation and adaption tests. Finally a new direct frequency synthesizer was achieved.