DocumentCode :
3664705
Title :
Ultra-low power green electronic devices
Author :
S. H. Yi;Albert Chin
Author_Institution :
Department of Electronics Engineering, National Chiao-Tung University, Hsinchu, Taiwan
fYear :
2015
fDate :
6/1/2015 12:00:00 AM
Firstpage :
285
Lastpage :
288
Abstract :
Power consumption is the crucial challenge for electronics. To lower the DC leakage power (PDC), we applied the high-κ gate dielectric to CMOS from the physics of Q equivalent to CV. More than 2 orders of magnitude lower PDC is obtained at small 0.5-0.9 nm equivalent-oxide-thickness (EOT). The high-κ dielectric also increases the charge controllability of flash memory and decrease the VT disturbance by nearly cells, which improves cell density and cost. The AC power (PAC) can be lowered by using high-mobility Ge CMOS at a lower VD and 3D IC with a small capacitance, from basic physics of PAC equivalent to CVD2f/2.
Keywords :
"Conferences","Electron devices","Solid state circuits"
Publisher :
ieee
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2015 IEEE International Conference on
Print_ISBN :
978-1-4799-8362-9
Type :
conf
DOI :
10.1109/EDSSC.2015.7285106
Filename :
7285106
Link To Document :
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