DocumentCode :
3664754
Title :
System level modeling and verification for routers of 3D-NoC based on system C
Author :
Han Jia; Jianming Lei
Author_Institution :
Sch. of Opt. &
fYear :
2015
fDate :
6/1/2015 12:00:00 AM
Firstpage :
479
Lastpage :
482
Abstract :
Traditional hardware description language is not fit for the system level modeling of complex NoC(network on chip), compared to traditional HDL, System C has advantages in modeling and software/hardware co-design. In this paper, through the study on the framework of 3D-NoC and System C modeling method, we have managed the modeling of a 3D-NoC system with MESH framework.
Keywords :
"Conferences","Electron devices","Solid state circuits"
Publisher :
ieee
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2015 IEEE International Conference on
Print_ISBN :
978-1-4799-8362-9
Type :
conf
DOI :
10.1109/EDSSC.2015.7285155
Filename :
7285155
Link To Document :
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