DocumentCode :
3664827
Title :
Influence of dielectric pocket on electrical characteristics of tunnel field effect transistor: A study to optimize the device efficiency
Author :
Mridula Gupta Upasana;Rakhi Narang;Manoj Saxena
Author_Institution :
Semiconductor Device Research Laboratory, Department of Electronic Science, University of Delhi South Campus, New Delhi-110021, India
fYear :
2015
fDate :
6/1/2015 12:00:00 AM
Firstpage :
762
Lastpage :
765
Abstract :
A simulation based study to optimize the device efficiency has been carried out for a recently proposed device architecture i.e. Dielectric Pocket (DP) TFET. In this work, the impact of pocket scaling (both height and thickness) and different dielectric combinations (for both pocket dielectric and gate dielectric) on the device performance has been investigated using ATLAS device simulator. The device promises an improved performance in terms of increased on-state current Ion, increased transconductance gm, increased Ion-Ioff ratio, reduced subthreshold swing, gate capacitance and threshold voltage value.
Keywords :
"Dielectrics","Logic gates","Dielectric materials","Tunneling","Hafnium compounds","Capacitance","Color"
Publisher :
ieee
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2015 IEEE International Conference on
Print_ISBN :
978-1-4799-8362-9
Type :
conf
DOI :
10.1109/EDSSC.2015.7285229
Filename :
7285229
Link To Document :
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