DocumentCode :
3664845
Title :
Optimizing latency and CPU load in packet processing systems
Author :
Paul Emmerich;Daniel Raumer;Alexander Beifuß;Lukas Erlacher;Florian Wohlfart;Torsten M. Runge;Sebastian Gallenmüller;Georg Carle
Author_Institution :
Technische Universitä
fYear :
2015
fDate :
7/1/2015 12:00:00 AM
Firstpage :
1
Lastpage :
8
Abstract :
High-speed network cards supporting 10 or 40GbE (Gigabit Ethernet) are available today. Software frameworks for high-speed packet reception and transmission were created to exhaust the performance of these cards. However, these frameworks are not applicable as general-purpose solution. Thus, it is necessary to revisit general purpose network IO software that was designed more than a decade ago. In standard Linux settings, connectivity between applications and physical networks happens via the New API (NAPI). This motivated us to investigate how underlying NIC drivers can be adapted to improve latency in combination with the Linux NAPI. Based on testbed measurements, we propose an optimized algorithm for the NIC driver to dynamically adapt the Interrupt Throttling Rate (ITR). We implemented the algorithm and evaluated it with latency and throughput measurements based on the Linux module of Open vSwitch that operates on top of the NAPI. Our measurements show that our new ITR algorithm improves the packet latency without affecting the CPU load as much as other solutions.
Keywords :
"Linux","Throughput","Hardware","Heuristic algorithms","Kernel","Generators"
Publisher :
ieee
Conference_Titel :
Performance Evaluation of Computer and Telecommunication Systems (SPECTS), 2015 International Symposium on
Type :
conf
DOI :
10.1109/SPECTS.2015.7285275
Filename :
7285275
Link To Document :
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