DocumentCode :
3667894
Title :
Investigation of leakage current in pinned photodiode CMOS imager pixel with negative transfer-gate bias operation
Author :
Yosuke Takeuchi;Tatsuya Kunikiyo;Takeshi Kamino;Masatoshi Kimura;Motoaki Tanizawa;Yasuo Yamaguchi
Author_Institution :
Renesas Electronics Corporation, 751 Horiguchi, Hitachinaka, Ibaraki 312-8504, Japan
fYear :
2015
Firstpage :
76
Lastpage :
79
Abstract :
The characteristics of leakage current observed in the pixels of pinned photodiode CMOS image sensor with negative transfer-gate bias operation are investigated, taking metal contamination into account. Simulation results show that interface states between insulator and the pinned layer in the vicinity of transfer gate, acting as hole traps, are responsible for negative transfer-gate bias dependence of the dark current.
Keywords :
"Dark current","Electron traps","Logic gates","Silicon","Photodiodes","Iron","Insulators"
Publisher :
ieee
Conference_Titel :
Simulation of Semiconductor Processes and Devices (SISPAD), 2015 International Conference on
ISSN :
1946-1569
Print_ISBN :
978-1-4673-7858-1
Type :
conf
DOI :
10.1109/SISPAD.2015.7292262
Filename :
7292262
Link To Document :
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