Title :
Integrated modeling platform for High-k/alternate channel material heterostructure stacks
Author :
Dhirendra Vaidya;Arjun Hegde;Saurabh Lodha;Swaroop Ganguly;Aneesh Nainani;Naomi Yoshida;Theresa Guarini
Author_Institution :
Electrical Engineering Department, Indian Institute of Technology Bombay, Mumbai, India
Abstract :
To study the High-k dielectrics on alternate semiconductor materials for transistors a modeling platform has been developed which implements a faster 1D Schrodinger-Poisson along with trap models. A fitting algorithm is used for the extraction of trap profiles which fits the model capacitance/admittance to the measurements in the least square sense. The extraction is illustrated on a subnanometer EOT HfO2/SiGe/Si heterostructure stack.
Keywords :
"Capacitance-voltage characteristics","Capacitance","Silicon germanium","Silicon","High K dielectric materials","Fitting","MOS capacitors"
Conference_Titel :
Simulation of Semiconductor Processes and Devices (SISPAD), 2015 International Conference on
Print_ISBN :
978-1-4673-7858-1
DOI :
10.1109/SISPAD.2015.7292341
