Title :
Factors that influence delamination at the bottom of open TSVs
Author :
S. Papaleo;W. H. Zisser;H. Ceric
Author_Institution :
Christian Doppler Laboratory for Reliability Issues in Microelectronics at the Institute for Microelectronics, TU Wien, Guß
Abstract :
We have analyzed how the mechanical and geometrical parameters of the Open Through Silicon Vias influence failures induced by delamination of the interfaces. Through Silicon Vias are the units of the interconnection structure that establish the connection through the silicon die. We show that there are different factors that influence the failure of the device by analyzing the effect of external forces and different thicknesses of the layers on delamination. From our simulations we found how the mechanical and geometrical parameters influence the Energy Release Rate and therefore the probability of delamination.
Keywords :
"Delamination","Silicon","Force","Tin","Through-silicon vias","Compressive stress"
Conference_Titel :
Simulation of Semiconductor Processes and Devices (SISPAD), 2015 International Conference on
Print_ISBN :
978-1-4673-7858-1
DOI :
10.1109/SISPAD.2015.7292350