Data-triggered breakpoint for in-circuit debug without re-implementation

In this paper we propose a new breakpoint mechanism, which improves controllability of in-circuit debug. It monitors data packets transmitted on the interface port of the target hardware, and triggers a breakpoint when a specified packet is detected among them in realtime. Regarding a data packet as a series of data sequences, we employ an efficient data sequence matching circuit, which is general purpose and is not restricted to specific protocols or applications. Owing to linearity of CRC (Cyclic Redundancy Check) and co-operation with a software debugger, that matching method is implemented with a simple in-circuit debug module, and achieves at-speed and realtime detection of specified data sequences. Moreover, changing breakpoint conditions does not require hardware re-implementation, but requires just modifying values of data registers inside the debug module. We expect this brings verification operators enormous reduction of both efforts and TAT (Turn-Around-Time) for in-circuit debug. Our experimental results show our proposed method can be implemented in an efficient hardware with small area overheads, and can work with enough accuracy and speed for practical use.