• DocumentCode
    3668983
  • Title

    UniStream: A unified stream architecture combining configuration and data processing

  • Author

    Jian Yan; Jifang Jin;Ying Wang; Xuegong Zhou;Philip Leong; Lingli Wang

  • Author_Institution
    State Key Laboratory of ASIC and System, Fudan University, No. 825 Zhangheng Road, Shanghai, China
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This paper proposes UniStream, a unified stream architecture based on point-to-point stream channels combining both bitstream configuration and data stream processing. In addition, unified APIs are provided to support bitstream configuration and data stream processing, as well as the stream interconnect. A cost model is also presented for the overhead on the stream interconnect, hardware task configuration and data stream processing at system level, which can be used during the early stage of development. The flexibility and high efficiency of UniStream are demonstrated on Xilinx Virtex-5 and Virtex-6 FPGAs. Experimental results on bitstream configuration/ read-back, data encryption/decryption and Discrete Cosine Transformation show that performance can be significantly improved with different stream modes.
  • Keywords
    "Hardware","Computer architecture","Field programmable gate arrays","System-on-chip","Throughput","Software","Data models"
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications (FPL), 2015 25th International Conference on
  • Type

    conf

  • DOI
    10.1109/FPL.2015.7294000
  • Filename
    7294000