Title :
Finding all DC solutions of nonlinear circuits using parallelogram LP test
Author :
Kiyotaka Yamamura;Suguru Ishiguro
Author_Institution :
Faculty of Science and Engineering, Chuo University, Tokyo, 112-8551 Japan
Abstract :
An efficient algorithm is proposed for finding all DC solutions of nonlinear circuits using linear programming. This algorithm is based on a simple test (termed the LP test) for nonexistence of a solution to a system of nonlinear equations in a given region. In the conventional LP test, a system of nonlinear equations is transformed into a linear programming problem by surrounding component nonlinear functions by rectangles. Then, the emptiness or nonemptiness of the feasible region is checked by the dual simplex method. In this paper, we propose a new LP test algorithm using both rectangles and parallelograms, and shows that the proposed algorithm is more efficient than the conventional algorithms using rectangles only or parallelograms only.
Keywords :
"Algorithm design and analysis","Linear programming","Nonlinear equations","Circuit theory","Nonlinear circuits","Switches"
Conference_Titel :
Circuit Theory and Design (ECCTD), 2015 European Conference on
DOI :
10.1109/ECCTD.2015.7300124