• DocumentCode
    3673039
  • Title

    Single-miller all-passive compensation network for three-stage OTAs

  • Author

    Giuseppe Di Cataldo;Alfio Dario Grasso;Gaetano Palumbo;Salvatore Pennisi

  • Author_Institution
    DIEEI - (Dipartimento di Ingegneria Elettrica Elettronica e Informatica), Università
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    A compensation technique for low-power high-capacitive-load three-stage operational transconductance amplifiers is presented in this paper. The compensation network is made of passive components only and, as an example, the proposed technique was used to design a three-stage amplifier in a standard CMOS 65-nm technology. The amplifier achieves a 2.64-MHz gain-bandwidth product when driving a 1-nF capacitance by consuming only 155 μW from a 2.5-V supply. Simulation results are found in good agreement with theoretical analysis and show an improvement in both small-signal and large-signal amplifier performance over previously reported solutions.
  • Keywords
    "Capacitors","Topology","Capacitance","Network topology","Transistors","Transfer functions","Gain"
  • Publisher
    ieee
  • Conference_Titel
    Circuit Theory and Design (ECCTD), 2015 European Conference on
  • Type

    conf

  • DOI
    10.1109/ECCTD.2015.7300130
  • Filename
    7300130