A TDMA-Based arbitration scheme for mixed-criticality multicore platforms

In mixed-criticality systems, applications of different criticality levels share the same computing platform. To avoid spatial and temporal interference of the applications, the computing platform must implement measures for spatial and temporal isolation. In this paper we show how the enhancement of a static, TDMA-based memory arbiter by a second, dynamic arbitration layer facilitates the interference-free integration of mixed-criticality applications with different performance requirements. This paper compares the performance tradeoffs of the new dual-layer arbiter and a COTS arbiter and evaluates the performance of a hypervisor running on a platform with this dual-layer arbiter.