A Lattice-Based Representation of Temporal Failures

Undetected failures in critical control systems can be catastrophic, including the loss of human lives or huge amounts of money. The safety assessment process aims to minimize such problems. In a previous work, we showed a strategy based on the process algebra CSP to obtain failure logic (a kind of Boolean structure expression or function representing part of a static fault tree) from a set of sequences of faults (or failure traces) which leads to unwanted outputs. Following common practices in industry, we used Simulink diagrams as an input of our strategy. In this work we define a representation of failure traces in terms of a lists-based bounded lattice. These failure traces are now able to describe temporal failures (with a notion of fault propagation). We show that the proposed lattice is indeed a Boolean algebra. This means we benefit from Boolean algebra´s properties, laws and existing reduction techniques. We illustrate our work on a simple but real case study supplied by our industrial partner EMBRAER.