Reducing power consumption by switching between serial mode and parallel mode

Modern Field Programmable Gate Array (FPGA) is becoming favorable for designing Software Defined Radio (SDR) and Cognitive Radio (CR) equipments, because it has good performance and is providing increasingly flexibility. Several kinds of embedded processors are integrated inside FPGAs, and especially, some FPGAs support Dynamic Partial Reconfiguration (DPR) technique, which is a quite useful ability that could implement different functionalities in the same area of the device. This feature enables the implementation of multimode multiband radios in the same device, and at the same time gives the potential win of resources as well as power consumption.