DocumentCode :
3678308
Title :
A novel approach toward parallel implementation of BFS algorithm using graphic processor unit
Author :
Fahmid Al Farid;Md. Sharif Uddin;Shohag Barman;Amirhossein Ghods;Sowmitra Das;Md. Mehedi Hasan
Author_Institution :
School of Electrical Engineering, University of Ulsan, 93 Daehak-ro, Mugeo-dong, Nam-gu, 680-749, South Korea
fYear :
2015
fDate :
5/1/2015 12:00:00 AM
Firstpage :
1
Lastpage :
4
Abstract :
Graph related algorithms are significant to many of the research areas and disciplines. A very big graph with millions of vertices is common in scientific research works and in the implementations of engineering tasks. Many researcher have tried to implement graph algorithms in parallel architectures, where in this paper, authors have tried to accelerate this implementation in an efficient way. In this paper, a GPU implementation of breadth-first search (BFS) is introduced to accelerate graph algorithm implementation. First, a BFS algorithm is implemented in a sequential environment and then on GPU. Experimental results show that the GPU-based approach of BFS outperforms the same as sequential.
Keywords :
"Graphics processing units","Instruction sets","Flowcharts","Acceleration"
Publisher :
ieee
Conference_Titel :
Electrical Engineering and Information Communication Technology (ICEEICT), 2015 International Conference on
Type :
conf
DOI :
10.1109/ICEEICT.2015.7307536
Filename :
7307536
Link To Document :
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