Analysis of the power semiconductor design rating for three-level neutral-point-clamped inverter based on data sheet parameters

This paper presents a method for the calculation of the power semiconductor rating based on data sheet parameters of the three-level Neutral-Point-Clamped (NPC) inverter. Beside the basic equations for calculating the turn-on and turn-off losses for Insulated Gate Bipolar Transistors (IGBT) and diodes, the electrical inverter topology, the different current paths for the commutations and the critical operation points are shown. The power semiconductor rating is investigated for different operation conditions and shows the influence of the reverse-recovery performance of the commutation diode on the IGBT behaviour. The method works in this way, that `virtual´ (interpolated) power semiconductors are selected in an optimization program to reach in one of possible operation points the maximum junction temperature. The design calculations and analysis are exemplarily carried out for a low power 20 kW electrical drive inverter for an electric vehicle and a high power 1 MVA wind inverter system. This method can well be applied to accurately compare the design rating of power semiconductor topologies.