Single-Ended and Differential MRAMs Based on Spin Hall Effect: A Layout-Aware Design Perspective

Spin-based memories have shown an immense promise for on-chip memory applications due to the possibilities of introducing non-volatility in caches employing a CMOS compatible process. Non-volatility leads to zero-standby leakage. However, at the same time, exploration of energy-efficient read and write mechanisms is important to lower the overall energy-consumption of an MRAM cache. Magnetization control employing spin-hall effect is one of the most promising approaches to enhance the write energy efficiency. A separate path for the read which comprises of a magnetic tunnel junction (MTJ) offers the benefits of simultaneous optimization of the read and write operations. In fact, spin-hall effect also leads to the possibility of designing cells with differential sensing. However, the advantages of a differential read over a single-ended read in terms of higher read speed and better noise immunity comes at the cost of larger number of access transistors, which may translate to lower integration density. In this paper, we perform a comparative analysis of spin-hall effect (SHE) based MRAM cells with single-ended and differential read mechanisms in terms of the cell area, read performance and read stability. We perform a detailed layout analysis based on Fin FET technology to evaluate the impact of introducing differential sensing on cell area. Our analysis shows that when the layout area is determined by the pitch of the bit-line and source-line metal tracks, the differential cell shows 1.5X increase in the cell area compared to the single-ended SHE MRAM. The area increase is 2X if the read access transistor determines the layout footprint. However, the differential sensing offers the advantages of ~48% increase in the read performance along with 6% to 9% boost in the read stability compared to the single-ended SHE MRAM. At iso-area, the differential cell shows ~24% lower read time and 12% higher read disturb margin with a similar write performance and power. Our analysis also presents other layout-driven perspectives on the design of differential and single-ended SHE MRAMs.