A Cellular Automata Based Fault Tolerant Approach in Designing Test Hardware for L1 Cache Module

Although fault detection can be successfully made using 2-state 3-neighborhood null boundary cellular automata(as dealt with in our previous work), self correcting property, however, can not be achieved this way. The present work deals with 2-state 5-neighborhood CA instead, which has been found to be self correcting with a much higher efficiency. This fault tolerant approach in designing the test hardware for testing the cache module in chip multiprocessors (CMPs), has been found to achieve 100% accuracy in single stuck-at one fault. It can also challenge multiple stuck-at one fault and can give22% accuracy.