A cascaded two-port bridge multilevel converter with automatic voltage balancing capability

Modular multi-level converters need to be switched at fundamental frequency (60 Hz) in order to minimize switching losses. But, the voltage balancing of the individual DC link capacitors can only be performed in `N´ fundamental cycles leading to impractical capacitor ratings. Alternatively, by continuously sensing the current direction and polling capacitor voltages, balancing action can be achieved in two fundamental cycles. But, the DSP and FPGA resources used are extremely high leading to an impractical system. In this paper, a cascaded two-port bridge multilevel converter is proposed. Using the proposed converter, the DC capacitor voltage balancing can be performed in one fundamental cycle leading to low DC link capacitance. Continuous monitoring of arm current and capacitor voltage polling also are not necessary for voltage balancing.