Analysis and Implementation of Modified Costas Loop for QPSK

This paper proposed a new Modified Costas loop to achieve carrier wave synchronization for QPSK with equal prior probability, as the conventional PLL can´t make it due to the absence of the carrier partition. Models about phase detector, loop filter, and voltage controlled oscillator are designed in Simulink, and System Generator is also used to generate code automatically and download it into FPGA. Hardware-In-the-Loop co-simulation is implemented to output the results in the Simulink simultaneously. The results shows that the demodulated signal generated by the Costas structure has nice eye pattern and constellation map, and the design can lock the carrier frequency very well. Also, the system can get high performance through real-time debug and dynamic display, and can be applied in real engineering analysis.