• DocumentCode
    3682291
  • Title

    A 0.7–1.15GHz complementary common-gate LNA in 0.18μm SOI CMOS with +15dBm IIP3 and >1kV HBM ESD protection

  • Author

    Barend van Liempd;Saneaki Ariumi;Ewout Martens;Shih-Hung Chen;Piet Wambacq;Jan Craninckx

  • Author_Institution
    imec, Leuven, Belgium
  • fYear
    2015
  • Firstpage
    164
  • Lastpage
    167
  • Abstract
    IM3-cancellation is a popular technique in LNAs to achieve very high linearity, but is also very sensitive to the exact device (bias) operating point. A 0.7-1.15GHz complementary common-gate LNA in 0.18μm silicon-on-insulator CMOS is presented that achieves good out-of-band (OOB) linearity without IM3-cancellation. Measurements of the 0.9mm2 prototype show a gain of >7dB, an NF of <;2.3dB, more than +15dBm OOB-IIP3 and over 0dBm B1dB. Compared to other work, this LNA has a similar or better linearity at only 10mW. The LNA uses a nominal supply of 2.5V, but was tested up to 3.7V and showed no significant degradation of its linearity for ±400mV supply variations. A power clamp, designed to enable testing at higher core supply voltage, withstands a >2.6kV HBM discharge, while the overall circuit is protected for >1kV HBM discharges.
  • Keywords
    "Linearity","Electrostatic discharges","CMOS integrated circuits","Clamps","Noise measurement","Discharges (electric)","Radio frequency"
  • Publisher
    ieee
  • Conference_Titel
    European Solid-State Circuits Conference (ESSCIRC), ESSCIRC 2015 - 41st
  • ISSN
    1930-8833
  • Print_ISBN
    978-1-4673-7470-5
  • Type

    conf

  • DOI
    10.1109/ESSCIRC.2015.7313854
  • Filename
    7313854