DocumentCode
3682823
Title
Trace signal selection methods for post silicon debugging
Author
Shridhar Choudhary;Amir Masoud Gharehbaghi;Takeshi Matsumoto;Masahiro Fujita
Author_Institution
Dept. of Electrical Engineering and Information Systems, The University of Tokyo, JAPAN
fYear
2015
Firstpage
258
Lastpage
263
Abstract
In post-silicon debugging, only a limited number of states (flip-flops) can be traced, due to the area overhead that is introduced by trace buffers. Therefore, it is important to select the states which can restore most of the other states. There exist researches that try to heuristically select a set of flip-flops (FFs) which maximizes the number of restored FFs. We first show that those existing works are not so robust, as the cost functions used for selections do not work well in some cases. In this paper, we introduce a new signal selection that tries to improve the selection by swapping the FFs that are going to be traced. Furthermore, we introduce a hardware implementation of the method that is more than 3 orders of magnitude faster than software-based swapping. With the proposed methods, we can improve the signal selection and get consistent results even for large circuits.
Keywords
"Debugging","Software","Logic gates"
Publisher
ieee
Conference_Titel
Very Large Scale Integration (VLSI-SoC), 2015 IFIP/IEEE International Conference on
Electronic_ISBN
2324-8440
Type
conf
DOI
10.1109/VLSI-SoC.2015.7314426
Filename
7314426
Link To Document