DocumentCode :
3682835
Title :
Hardware/software partitioning of embedded System-on-Chip applications
Author :
Jia Wei Tang;Yuan Wen Hau;MN Marsono
Author_Institution :
Faculty of Electrical Engineering, Universiti Teknologi Malaysia, Malaysia
fYear :
2015
Firstpage :
331
Lastpage :
336
Abstract :
HW/SW partitioning is an important development step during HW/SW co-design to ensure application performance in embedded System-on-Chip (SoC). This paper formulates the optimization of HW/SW partitioning aiming at maximizing streaming throughput with predefined area constraint, targeted for multi-processor system with hardware accelerator sharing capability. Two software-oriented and the second hardware-oriented greedy heuristic algorithms for HW/SW partitioning are proposed and tested on several random graphs and one multimedia application (MP3 decoder). Results show that the best result from both proposed greedy algorithms produce 93.6% near-optimal solution compared to brute force ground truth with faster HW/SW partitioning time.
Keywords :
"Hardware","Throughput","Program processors","Digital audio players","Decoding","Greedy algorithms"
Publisher :
ieee
Conference_Titel :
Very Large Scale Integration (VLSI-SoC), 2015 IFIP/IEEE International Conference on
Electronic_ISBN :
2324-8440
Type :
conf
DOI :
10.1109/VLSI-SoC.2015.7314439
Filename :
7314439
Link To Document :
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