DocumentCode :
3683126
Title :
HBM failures induced by ESD cell turn-off and circuit interaction with ESD protection
Author :
Yang Xiao;Ann Concannon;Rajkumar Sankaralingam
Author_Institution :
Analog ESD Lab, Texas Instruments, 12500 TI Blvd, Dallas, 75423, USA
fYear :
2015
Firstpage :
1
Lastpage :
7
Abstract :
Limited ESD simulations are often combined with topology checks to avoid ESD weaknesses arising from transient circuit interaction with ESD protection. In this work, we focus on a product designed using such a methodology exhibiting HBM failures. The failures were narrowed down to circuit interaction at ESD cell turn-on and turn-off.
Keywords :
"Electrostatic discharges","Computer architecture","Microprocessors","Stress","Resistors","Voltage measurement","Hardware design languages"
Publisher :
ieee
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2015 37th
Type :
conf
DOI :
10.1109/EOSESD.2015.7314762
Filename :
7314762
Link To Document :
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